2d Iir Beam Filter

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1

Synthesis and Array Processor Realization of a 2-D IIR Beam Filter for Wireless Applications
Rimesh M. Joshi, Student Member, IEEE, Arjuna Madanayake, Member, IEEE, Jithra Adikari, Member, IEEE, and Len T. Bruton, Fellow, IEEE

Abstract—A broadband digital beamforming algorithm is proposed for directional filtering of temporally-broadband bandpass space-time plane-waves at radio frequencies (RFs). The enhancement of desired waves, as well as rejection of undesired interfering plane-waves, is simulated. A systolic- and wavefront-array architecture is proposed for the real-time implementation of second-order spatially-bandpass (SBP) 2-D infinite impulse response (IIR) beam filters having potential applications in broadband beamforming of temporally down-converted RF signals. The higher speed of operation and potentially reduced power consumption of the asynchronous architecture of wavefront-array processors (WAPs) in comparison to the conventional synchronous hardware has emerging applications in radio-astronomy, radar, navigation, space science, cognitive radio, and wireless communications. Further, the bit error rate (BER) performance improvement along with the reduced computational complexity of the 2-D IIR SBP frequency-planar digital filter over digital phased array feed (PAF) beamformer is provided. A nominal BER versus signal-to-interference ratio (SIR) gain of 10–16 dB compared to case where beamforming is not applied, and a gain of 2–3 dB at approximately half the number of parallel multipliers to digital PAF, are observed. The results of application-specific integrated circuit (ASIC) synthesis of the digital filter designs are also presented. Index Terms—Array processors, bit error rate (BER), digital phased array feed (PAF), field-programmable gate

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Joshi (S’10) received the B.E. degree in electronics and communication engineering from Tribhuvan University, Kathmandu, Nepal, in 2008, and the M.S. degree in electrical engineering from the University of Akron, Akron, OH, in 2011. Arjuna Madanayake (M’03) received the B.Sc. degree in electronic and telecommunication engineering from the University of Moratuwa, Moratuwa, Sri Lanka, in 2002, and the M.Sc. and Ph.D. degrees in electrical engineering from the University of Calgary, Calgary, Canada, in 2004 and 2008, respectively. He is a Tenure-track Assistant Professor with the Department of Electrical and Computer Engineering, University of Akron, Akron, OH. Jithra Adikari (M’07) received B.Sc. degree in electronic and telecommunication engineering from the University of Moratuwa, Moratuwa, Sri Lanka, in 2002, the M.Sc. degree in information technology from the Royal Institute of Technology (KTH), Stockholm, Sweden, in 2005, and the Ph.D. degree in electrical and computer engineering from the University of Calgary, Calgary, AB, Canada, in 2010. He is with Elliptic Technologies, Canada. He was with the University of Waterloo, Waterloo, ON, Canada. Len T. Bruton (F’81) is Professor Emeritus with the Department of Electrical and Computer Engineering, University of Calgary, Calgary, AB, Canada. Prof. Bruton was a recipient of many awards including the 2002 IEEE Circuits and Systems Education Award, the 1994 IEEE Outstanding Engineering Award, and the 1991 Manning Principal Award. In 1994, he was elected a fellow of the Royal Society of Canada. He has been featured in the 1997 Great Canadian Scientists by Barry Shell.