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1.state the function of STACK POINTER (SP) REGISTER
2.explain the function of XTHL instruction with one example
3.identify the addesresing mode of the instruction SHLD 9000H
4.if the clock period of 8085 is 0.2 µs calculate the time required to execute I) RAR II) INX D III) DCX H IV) CALL 2070 V) RET VI) PUSH VII) POP VIII) JNZ BACK
5.Give single instruction to deviode the even number in a (accumulator) register by 2.
6.what is the content of carry flag if ANA B is executed?
7.draw and explain timing diagram of LXI H ,2000H
8.WRITE APROGRAM TO COUNT THE NUMBER OF UPPER CASE AND LOWER CASE LETTERS IN GIVEN STRING STORED AT LOCATION C200H ONWORDS. THE LOCATION C300H STORES THE LENGTH OF THE STRING IN BYTES. STORE THE COUNTS AT LOCATIONS C301H AND C302 H FOR UPPERCASE AND LOWERCASE RESPECTIVELY
9.WHAT IS THE CONTENT OF THE PC AFTER FETCHING 8 BIT/ 16 BIT DATA FROM A MEMORY LOCATION 3060H? THE INSTRUCTION TO FETCH THE DATA RESIDE 5123H
10.IF THE 8085 ADDS 58H AND A8 RESOECTIVELY SPECIFY THE CONTENT OF ACCUMULATOR AND THE STATUS OF S, ,Z AND CY FLAGS
11.DISCUSS FOLLOWING SIGNALS :
ALE,HOLD,READY,HLDA,
12.WHERE DOES THE STACK POINTER RESIDES ? WHAT IS STACK?
13.DISCUSS THE INTERNAL ARCHITECTURER OF 8085 WITH BLOCK DIAGRAM . DRAW STATUS REGISTER AND EXPLAIN
14.DRAW THE COMPLETE INTERFACING SCHEMES USED TO INTERFACE
EPROM 27128(16 K EPROM) AT ADDRESS 0000H
TWO RAM 6116 (2K RAM) NEXT TO EPROM
WITH 8085 USING FULL DECODING SCHEME MEMORY SHADOW SHOUND NOT BE THERE. DRAW MEMORY MAP AND SHOW ALL CONTROL SIGNAL
16.WHAT IS MEMORY SHADOW
17.GIVE DIFFERENCE BETWEEN ABSOLUTE AND PARTIAL DECODING
18.IDENTIFY THE ADDRESING MODE OF THE INSTRUCTION RAR AND RET
19.WHICH IS THE SINGLE INSTRUCTION FOR ADDITION OF TWO 16 BIT NUMBERS?
USING ARITHMATIC INSTRUCTION MULTIPLY THE CONTENT A BY 2
20.GIVE 8085 INSTRUCTION TO SET LOWER 4 BIT AND RESET UPPER 4 BITS OF A(ACCUMULATOR’)
21.WRITE A PRPGRAM TO SEPARATE UPPER AND LOWER
2.explain the function of XTHL instruction with one example
3.identify the addesresing mode of the instruction SHLD 9000H
4.if the clock period of 8085 is 0.2 µs calculate the time required to execute I) RAR II) INX D III) DCX H IV) CALL 2070 V) RET VI) PUSH VII) POP VIII) JNZ BACK
5.Give single instruction to deviode the even number in a (accumulator) register by 2.
6.what is the content of carry flag if ANA B is executed?
7.draw and explain timing diagram of LXI H ,2000H
8.WRITE APROGRAM TO COUNT THE NUMBER OF UPPER CASE AND LOWER CASE LETTERS IN GIVEN STRING STORED AT LOCATION C200H ONWORDS. THE LOCATION C300H STORES THE LENGTH OF THE STRING IN BYTES. STORE THE COUNTS AT LOCATIONS C301H AND C302 H FOR UPPERCASE AND LOWERCASE RESPECTIVELY
9.WHAT IS THE CONTENT OF THE PC AFTER FETCHING 8 BIT/ 16 BIT DATA FROM A MEMORY LOCATION 3060H? THE INSTRUCTION TO FETCH THE DATA RESIDE 5123H
10.IF THE 8085 ADDS 58H AND A8 RESOECTIVELY SPECIFY THE CONTENT OF ACCUMULATOR AND THE STATUS OF S, ,Z AND CY FLAGS
11.DISCUSS FOLLOWING SIGNALS :
ALE,HOLD,READY,HLDA,
12.WHERE DOES THE STACK POINTER RESIDES ? WHAT IS STACK?
13.DISCUSS THE INTERNAL ARCHITECTURER OF 8085 WITH BLOCK DIAGRAM . DRAW STATUS REGISTER AND EXPLAIN
14.DRAW THE COMPLETE INTERFACING SCHEMES USED TO INTERFACE
EPROM 27128(16 K EPROM) AT ADDRESS 0000H
TWO RAM 6116 (2K RAM) NEXT TO EPROM
WITH 8085 USING FULL DECODING SCHEME MEMORY SHADOW SHOUND NOT BE THERE. DRAW MEMORY MAP AND SHOW ALL CONTROL SIGNAL
16.WHAT IS MEMORY SHADOW
17.GIVE DIFFERENCE BETWEEN ABSOLUTE AND PARTIAL DECODING
18.IDENTIFY THE ADDRESING MODE OF THE INSTRUCTION RAR AND RET
19.WHICH IS THE SINGLE INSTRUCTION FOR ADDITION OF TWO 16 BIT NUMBERS?
USING ARITHMATIC INSTRUCTION MULTIPLY THE CONTENT A BY 2
20.GIVE 8085 INSTRUCTION TO SET LOWER 4 BIT AND RESET UPPER 4 BITS OF A(ACCUMULATOR’)
21.WRITE A PRPGRAM TO SEPARATE UPPER AND LOWER