Evaluate Ber in Gsm and Wcdma Systems
Evaluate BER in GSM and WCDMA Systems
1 BER in GSM System :
1.1 Approach and Conceptual Transceiver Structure : The simulation described consists a baseband parts only. The parts included are illustrated in figure 1.1, where a conceptual block diagram of a GSM transmitter and receiver system is sketched. Only the highlighted blocks are implemented.
The voice interfaces including microphone, speech encoder/decoder, and loudspeaker are not intended to be included in the toolbox. Instead, to supply the input signal to the channel encoder/interleaver random bits are generated, as Figure 3.3 displays. By comparing this random input sequence with the reconstructed sequence delivered by the channel decoder/de-interleaver block the BER (Bit Error Rate) performance of the system is estimated.
1.2 Overall Transmitter Structure
The overall structure of the implemented transmitter is illustrated in Figure 3.4. The transmitter is, as illustrated, made up of four distinct functional blocks. To provide an input data stream to the channel encoder/interleaver a sequence of random data bits is generated by the random bit generator. The input sequence of Channel encoder block is o 260 bit long vector. The Channel encoder splits the incoming 260 information bits into three different classes, i.e. class Ia, class Ib, class II depending on the importance of the bits. The Channel encoding scheme utilized in GSM is illustrated in Figure 3.5. This sequence is after processing then accepted by the MUX which splits the incoming sequence to form a GSM normal burst. As this burst type requires that a training sequence is included this also must be supplied. This is in Figure 1.3 illustrated by the TRAINING parameter. The term TRAINING is also used throughout the simulation implementations to represent the training sequence. Upon having generated the prescribed GSM normal burst data structure the MUX returns this to the GMSKmodulator, where GMSK is short for
1 BER in GSM System :
1.1 Approach and Conceptual Transceiver Structure : The simulation described consists a baseband parts only. The parts included are illustrated in figure 1.1, where a conceptual block diagram of a GSM transmitter and receiver system is sketched. Only the highlighted blocks are implemented.
The voice interfaces including microphone, speech encoder/decoder, and loudspeaker are not intended to be included in the toolbox. Instead, to supply the input signal to the channel encoder/interleaver random bits are generated, as Figure 3.3 displays. By comparing this random input sequence with the reconstructed sequence delivered by the channel decoder/de-interleaver block the BER (Bit Error Rate) performance of the system is estimated.
1.2 Overall Transmitter Structure
The overall structure of the implemented transmitter is illustrated in Figure 3.4. The transmitter is, as illustrated, made up of four distinct functional blocks. To provide an input data stream to the channel encoder/interleaver a sequence of random data bits is generated by the random bit generator. The input sequence of Channel encoder block is o 260 bit long vector. The Channel encoder splits the incoming 260 information bits into three different classes, i.e. class Ia, class Ib, class II depending on the importance of the bits. The Channel encoding scheme utilized in GSM is illustrated in Figure 3.5. This sequence is after processing then accepted by the MUX which splits the incoming sequence to form a GSM normal burst. As this burst type requires that a training sequence is included this also must be supplied. This is in Figure 1.3 illustrated by the TRAINING parameter. The term TRAINING is also used throughout the simulation implementations to represent the training sequence. Upon having generated the prescribed GSM normal burst data structure the MUX returns this to the GMSKmodulator, where GMSK is short for