fsk modulation demodulation

1.1 ABSTRACT:

2 .1 BLOCK DIAGRAM:

Fig 2.1 Block diagram for FSK modulation and de-modulation

2.2.1 PIN DIAGRAM- IC 565 :

Fig 2.2 Pin diagram for IC 565 2.2.2 PIN DIAGRAM -IC 555: Fig 2.3 Pin diagram for IC 555

3.1 DESIGN CALCULATION:
3.1.1 FSK MODULATOR:
ON time TH=0.693RBC
OFF time TL=0.693(RA+RB)C
Total time T=TH+TL=0.693(RA+2RB)C

1 f1= -------------------------- → (1) 0.69(RA+2RB) C1

1 f2= ------------------------------------ →(2)
0.69(RA+2RB) C 1C2 ----------- C1+C2

Duty cycle D=ON time/Total time=(RB)/(RA+2RB)=0.3
RB= 0.3RA+0.6RB
RB=0.75RA
Let f1= 1050 Hz, f2= 1250 Hz, C1=0.01μf

From (1)

1
1050 = ---------------------------------
0.69(RA+2*0.75RA) 0.01μf

1 =---------------------------------
0.69*2.5RA*0.01μf

RA=55.2KΩ
RB=0.75RA
RB=41.4KΩ

From (2)

1
1250 = ------------------------------------------------
0.69(55.2KΩ+2(41.4KΩ)) 0.01μf*C2 ---------------- 0.01μf+C2

0.01μf+C2 C2 = ----------------------------------- 0.69(138KΩ)1250*0.01μf

0.01μf+C2 C2 = --------------- 1.19

1.19C2 - C2 = 0.01μf
0.19C2 = 0.01μf
C2 = 52.63 nf

3.1.2 FSK DEMODULATOR:

Upper cut off frequency of RC ladder circuit fH=1/(2πRC)
Assume R2=R3=R4=R C2=C3=C4=C fH=(key in frequency+2 maximum frequency)/2

=(150+2(1250))/2=1325Hz
Let C=0.02μf then R=1/(2πCfH)=1/(2π*1325Hz*0.02μf )=7K Ω f0=0.3/(R1C1) f0=(f1+f2)/2=(1050+1250)/2=1150Hz
Let C1=0.01μf
R1=0.3/(1150*0.01μf)=26K Ω

flock=8f0/10=(8*1150)/10=920Hz

fcapture should be less than flock.

Choose fcapture =400Hz

fcapture =(1/2π)(2π*flock)/(R0C0)