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Flip-flop (electronics)
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An SR latch, constructed from a pair of cross-coupled NOR gates. Red and black mean logical '1 ' and '0 ', respectively.
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.
Flip-flops and latches are used as data storage elements. Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.
Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered); the simple ones are commonly called latches.[1] The word latch is mainly used for storage elements, while clocked devices are described as flip-flops.[2]
Contents
[hide]
1 History
2 Implementation
3 Flip-flop types
3.1 Simple set-reset latches
3.1.1 SR NOR latch
3.1.2 SR NAND latch
3.1.3 JK latch
3.2 Gated latches and conditional transparency
3.2.1 Gated SR latch
3.2.2 Gated D latch
3.2.3 Earle latch
3.3 D flip-flop
3.3.1 Classical positive-edge-triggered D flip-flop
3.3.2 Master–slave pulse-triggered D flip-flop
3.3.3 Edge-triggered dynamic D storage element
3.4 T flip-flop
3.5 JK flip-flop
4 Metastability
5 Timing considerations
5.1 Setup, hold, recovery, removal times
5.2 Propagation



References: 1. ^ a b Volnei A. Pedroni (2008). Digital electronics and design with VHDL. Morgan Kaufmann. p. 329. ISBN 9780123742704. 4. ^ W. H. Eccles and F. W. Jordan (19 September 1919) "A trigger relay utilizing three-electrode thermionic vacuum tubes," The Electrician, vol. 83, page 298. Reprinted in: Radio Review, vol. 1, no. 3, pages 143–146 (December 1919). 5. ^ Emerson W. Pugh, Lyle R. Johnson, John H. Palmer (1991). IBM 's 360 and early 370 systems. MIT Press. p. 10. ISBN 9780262161237. 6. ^ Earl D. Gates (2000). Introduction to electronics (4th ed.). Delmar Thomson (Cengage) Learning. p. 299. ISBN 9780766816985. 7. ^ Max Fogiel and You-Liang Gu (1998). The Electronics problem solver, Volume 1 (revised ed.). Research & Education Assoc.. p. 1223. ISBN 9780878915439. 8. ^ Wilfred Bennett Lewis (1942). Electrical counting: with special reference to counting alpha and beta particles. CUP Archive. p. 68. 9. ^ The Electrician 128. Feb. 13, 1942. 10. ^ Owen Standige Puckle and E. B. Moullin (1943). Time bases (scanning generators): their design and development, with notes on the cathode ray tube. Chapman & Hall Ltd. p. 51. 11. ^ Britton Chance (1949). Waveforms (Vol. 19 of MIT Radiation Lab Series ed.). McGraw-Hill Book Co. p. 167. 12. ^ O. S. Puckle (Jan. 1949). "Development of Time Bases: The Principles of Known Circuits". Wireless Engineer (Iliffe Electrical Publications) 26 (1): 139. 13. ^ P. L. Lindley, Aug. 1968, EDN (magazine), (letter dated June 13, 1968). 14. ^ Montgomery Phister (1958). Logical Design of Digital Computers.. Wiley. p. 128. 17. ^ Langholz, Gideon; Kandel, Abraham; Mott, Joe L. (1998). Foundations of Digital Logic Design. Singapore: World Scientific Publishing Co. Ptc. Ltd.. p. 344. ISBN 978-981-02-3110-1 18 19. ^ a b Kogge, Peter M. (1981). The Architecture of Pipelined Computers. McGraw-Hill. pp. 25–27. ISBN 0-07-035237-2 20 21. ^ Earle, J. (March, 1965). "Latched Carry-Save Adder". IBM Technical Disclosure Bulletin 7 (10): 909–910 22 23. ^ a b Kunkel, Steven R.; Smith, James E. (May 1986). "Optimal Pipelining in Supercomputers". ACM SIGARCH Computer Architecture News (ACM) 14 (2): 404–411. doi:10.1145/17356.17403. ISSN 0163-5964 24 27. ^ a b Mano, M. Morris; Kime, Charles R. (2004). Logic and Computer Design Fundamentals, 3rd Edition. Upper Saddle River, NJ, USA: Pearson Education International. pp. pg283. ISBN 0-13-1911651. 28. ^ Thomas J. Chaney and Charles E. Molnar (April 1973). "Anomalous Behavior of Synchronizer and Arbiter Circuits". IEEE Transactions on Computers C-22 (4): 421–422. doi:10.1109/T-C.1973.223730. ISSN 0018-9340. 34. ^ Wu Haomin and Zhuang Nan (1991). "Research into ternary edge-triggered JKL flip-flop". Journal of Electronics (China) 8 (Volume 8, Number 3 / July, 1991): 268–275. doi:10.1007/BF02778378.

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