Maxwell – a 64 Fpga Supercomputer
Rob Baxter1, Stephen Booth,
Mark Bull, Geoff Cawood,
James Perry, Mark Parsons,
Alan Simpson, Arthur Trew
EPCC and FHPCA
Andrew McCormick,
Graham Smart,
Ronnie Smart
Alpha Data ltd and FPHCA
Allan Cantle,
Richard Chamberlain,
Gildas Genest
Nallatech ltd and FHPCA
1 communicating author: r.baxter@epcc.ed.ac.uk; 0131 651 3579;
University of Edinburgh, James Clerk Maxwell Building, King’s Buildings, Edinburgh EH9 3JZ
Abstract
We present the initial results from the FHPCA
Supercomputer project at the University of Edinburgh.
The project has successfully built a general-purpose 64
FPGA computer and ported to it three demonstration applications from the oil, medical and finance sectors.
This paper describes the machine itself – Maxwell – its hardware and software environment and presents very early benchmark results from runs of the demonstrators.
1. Introduction
Against the background of possibilities in the emerging area of high-performance reconfigurable computing [1] the FPGA High Performance Computing Alliance
(FHPCA [2]) was founded in early 2005 to take forward the ideas of an FPGA-based supercomputer. The alliance partners are Algotronix, Alpha Data, EPCC at the
University of Edinburgh, the Institute for System Level
Integration, Nallatech and Xilinx. The project was facilitated and part funded by the Scottish Enterprise
Industries team and had two main goals:
· design and build a 64-FPGA supercomputer from commodity parts and “plug-in” FPGA cards;
· demonstrate its effectiveness (or otherwise) for real-world high-performance computing (HPC) applications. We describe here the results of the first of these goals and report some early results of the second.
The machine itself – Maxwell – was completed in the first part of this year. We describe its architecture in
Section 3; interestingly it shares a number of similarities with the proposed petascale Reconfigurable Computing
Cluster described by Sass et al in [3].
Mark Bull, Geoff Cawood,
James Perry, Mark Parsons,
Alan Simpson, Arthur Trew
EPCC and FHPCA
Andrew McCormick,
Graham Smart,
Ronnie Smart
Alpha Data ltd and FPHCA
Allan Cantle,
Richard Chamberlain,
Gildas Genest
Nallatech ltd and FHPCA
1 communicating author: r.baxter@epcc.ed.ac.uk; 0131 651 3579;
University of Edinburgh, James Clerk Maxwell Building, King’s Buildings, Edinburgh EH9 3JZ
Abstract
We present the initial results from the FHPCA
Supercomputer project at the University of Edinburgh.
The project has successfully built a general-purpose 64
FPGA computer and ported to it three demonstration applications from the oil, medical and finance sectors.
This paper describes the machine itself – Maxwell – its hardware and software environment and presents very early benchmark results from runs of the demonstrators.
1. Introduction
Against the background of possibilities in the emerging area of high-performance reconfigurable computing [1] the FPGA High Performance Computing Alliance
(FHPCA [2]) was founded in early 2005 to take forward the ideas of an FPGA-based supercomputer. The alliance partners are Algotronix, Alpha Data, EPCC at the
University of Edinburgh, the Institute for System Level
Integration, Nallatech and Xilinx. The project was facilitated and part funded by the Scottish Enterprise
Industries team and had two main goals:
· design and build a 64-FPGA supercomputer from commodity parts and “plug-in” FPGA cards;
· demonstrate its effectiveness (or otherwise) for real-world high-performance computing (HPC) applications. We describe here the results of the first of these goals and report some early results of the second.
The machine itself – Maxwell – was completed in the first part of this year. We describe its architecture in
Section 3; interestingly it shares a number of similarities with the proposed petascale Reconfigurable Computing
Cluster described by Sass et al in [3].
References: Second NASA/ESA Conference on Adaptive Hardware and Systems, Edinburgh, 2007. on Adaptive Hardware and Systems, Edinburgh, 2007.