2.0 SUBJECT CODE : 203 3.0 PAPER CODE : 6342
8.0 DETAILED COURSE CONTENTS:
CHAPTER – 1.0 FUNDAMENTAL CONCEPTS:
1.1 Comparison between analog and digital signals.
1.2 Different types of number system and codes used in digital computers.
CHAPTER – 2.0 LOGIC GATES :
2.1 Basic Logic Gates: Logic symbols and truth table of all gates: AND, OR, NOT,
NAND, NOR, EX-OR,EX-NOR
2.2 Realization of all other gates using universal gate.
CHAPTER – 3.0 BOOLEAN ALGEBRA:
3.1 Rules and laws of Boolean algebra, Demorgan’s theorem.
3.2 Evaluation of logic expression, algebraic reduction of Boolean
CHAPTER – 4.0 COMBINATIONAL LOGIC DESIGN
4.1 Introduction to logic design
4.2 Karnaugh map representation of logical functions, Simplification of logical function using K-map, (2, 3, 4 variable) Sum of products (SOP) Pproduct of
Sum (POS)
4.3 Don’t care conditions.
4.4 Design example: half adder, full adder, Half subtractor, full subtractor, BCD to seven-segment decoder (using k-map)
4.5 Gray to binary code converter (using k-map)
4.6 Universal Gate
CHAPTER – 5.0 CONBINATIONAL LOGIC DESIGN USING MSI AND LSI
CIRCUITS
5.1 Multiplexer (:1) demultiplexer (1:4), Decoder (3:8) encoder (8:3) using combinational logic design.
5.2 BCD adder, using (7483). ALU(74181). Digital comparator (7485),Parity generator/checkers(74180). 5.3 Code converters: BCD to binary(74184), Binary to BCD(74185A)
5.4 Priority encoder: Decimal to BCD(74147), Octal to binary priority encoder
(74148) Hexadecimal to binary priority encoder using 74148 encoders.
5.5 Decoder/drivers for display device:BCD to decimal decoder/driver (7447, 7448)
CHAPTER – 6 LOGIC FAMILIES:
6.1 Digital integrated circuits, its introduction
6.2 Introduction: RTL, DTL, IIL, ECL, MOS families
6.3 Propagation delay time, speed, power consumption, fan_in , fan_out.
6. 6.5 Analysis of open collector and tri-state logic, Input/output parameters, advantages, applications,