Parallelization of Pagerank and Hits Algorithm on Cuda
Parallelization of PageRank and HITS Algorithm on CUDA Architecture
‡ ‡ Kumar Ishan, Mohit Gupta, Naresh Kumar, Ankush Mittal† ‡
Department of electronics & Computer Engineering, Indian Institute of Technology, Roorkee, India. {kicomuec, mickyuec, naresuec, ankumfec}@iitr.ernet.in
Abstract Efficiency of any search engine mostly depends on how efficiently and precisely it can determine the importance and popularity of a web document. Page Rank algorithm and HITS algorithm are widely known approaches to determine the importance and popularity of web pages. Due to large number of documents available on World Wide Web, huge amount of computations are required to determine the rank of web pages making it very time consuming. Researchers have devoted much attention in parallelizing PageRank on PC Cluster, Grids, and Multi-core processors like Cell Broadband Engine to overcome this issue but with little or no success. In this paper, we discuss the issues in porting these algorithms on Compute Unified Device Architecture (CUDA) and introduce efficient parallel implementation of these algorithms on CUDA by exploiting the block structure of web, which not only cut down the computation time but also significantly reduces of the cost of hardware required (only few thousands).
1. Introduction In present days, the unceasing growth of World Wide Web has lead to a lot of research in page ranking algorithms used by the search engines to provide the most relevant results to the user for any particular query. The dynamic and diverse nature of web graph further exaggerates the challenges in achieving the optimum results. Web link analysis provides a way to order the web pages by studying the link structure of web graphs. PageRank and HITS (Hyperlink - Induced Topic Search) are two such most popular algorithms widely used by the current search engines either in same or modified form to rank the documents based on the link structure of the documents. PageRank, originally
‡ ‡ Kumar Ishan, Mohit Gupta, Naresh Kumar, Ankush Mittal† ‡
Department of electronics & Computer Engineering, Indian Institute of Technology, Roorkee, India. {kicomuec, mickyuec, naresuec, ankumfec}@iitr.ernet.in
Abstract Efficiency of any search engine mostly depends on how efficiently and precisely it can determine the importance and popularity of a web document. Page Rank algorithm and HITS algorithm are widely known approaches to determine the importance and popularity of web pages. Due to large number of documents available on World Wide Web, huge amount of computations are required to determine the rank of web pages making it very time consuming. Researchers have devoted much attention in parallelizing PageRank on PC Cluster, Grids, and Multi-core processors like Cell Broadband Engine to overcome this issue but with little or no success. In this paper, we discuss the issues in porting these algorithms on Compute Unified Device Architecture (CUDA) and introduce efficient parallel implementation of these algorithms on CUDA by exploiting the block structure of web, which not only cut down the computation time but also significantly reduces of the cost of hardware required (only few thousands).
1. Introduction In present days, the unceasing growth of World Wide Web has lead to a lot of research in page ranking algorithms used by the search engines to provide the most relevant results to the user for any particular query. The dynamic and diverse nature of web graph further exaggerates the challenges in achieving the optimum results. Web link analysis provides a way to order the web pages by studying the link structure of web graphs. PageRank and HITS (Hyperlink - Induced Topic Search) are two such most popular algorithms widely used by the current search engines either in same or modified form to rank the documents based on the link structure of the documents. PageRank, originally
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