Risc Sisc
RISC and CISC
What is RISC
RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highlyoptimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures.
Every instruction in a single clock after fetch and decode.
Smaller, less energy consumption.
Sun Sparc, IBM Power series both have RISC
RISC allows branch prediction and Pipelining because they require fixed length instructions.
What is RISC?
RISC?
RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than than a more specialized set of instructions often found in other types of architectures.
History
History
The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s.
The IBM 801, Stanford MIPS, and Berkeley were all designed with a similar philosophy which has become known as RISC.
Certain design features have been characteristic of most RISC processors:
one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called PIPELINING pipelining: a technique that allows for simultaneous execution of parts, or stages, of instructions to more efficiently process instructions; large number of registers: the RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of interactions with memory
RISC Attributes
The main characteristics of CISC microprocessors are:
Extensive instructions.
Complex and efficient machine instructions.
Microencoding of the machine instructions.
Extensive addressing capabilities for memory operations.
Relatively few registers.
In comparison, RISC processors are more or less the opposite of the above: Reduced instruction set.
Less complex,
What is RISC
RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highlyoptimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures.
Every instruction in a single clock after fetch and decode.
Smaller, less energy consumption.
Sun Sparc, IBM Power series both have RISC
RISC allows branch prediction and Pipelining because they require fixed length instructions.
What is RISC?
RISC?
RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than than a more specialized set of instructions often found in other types of architectures.
History
History
The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s.
The IBM 801, Stanford MIPS, and Berkeley were all designed with a similar philosophy which has become known as RISC.
Certain design features have been characteristic of most RISC processors:
one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called PIPELINING pipelining: a technique that allows for simultaneous execution of parts, or stages, of instructions to more efficiently process instructions; large number of registers: the RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of interactions with memory
RISC Attributes
The main characteristics of CISC microprocessors are:
Extensive instructions.
Complex and efficient machine instructions.
Microencoding of the machine instructions.
Extensive addressing capabilities for memory operations.
Relatively few registers.
In comparison, RISC processors are more or less the opposite of the above: Reduced instruction set.
Less complex,