RISC vs. CISC
CIT 595 Spring 2007
Reduced Instruction Set Architecture (RISC) emerged around early 80s
• Designers re-evaluating the current ISAs of the era • Found that ISAs had extensive instructions that were complex
Complex Instruction Set Architecture (CISC)
• Need only 20% of the instructions that were used most of the time
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Complex Instruction Set Computer (CISC)
Memory in those days was expensive bigger program->more storage->more money
Reduced Instruction Set Computer (RISC)
Original idea to reduce the ISA
Provide minimal set of instructions that could carry out all essential operations
Hence needed to reduce the number of instructions per program Number of instructions are reduced by having multiple operations within a single instruction Multiple operations lead to many different kinds of instructions that access memory In turn making instruction length variable and fetch-decodeexecute time unpredictable – making it more complex Thus hardware handles the complexity Example: x86 ISA
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Instruction complexity is reduced by 1. Having few simple instructions that are the same length 2. Allowed memory access only with explicit load and store instructions Hence each instruction performs less work but instruction execution time among different instructions is consistent The complexity that is removed from ISA is moved into the domain of the assembly programmer/compiler Examples: LC3, MIPS, PowerPC (IBM), SPARC (Sun)
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RISC vs. CISC
The difference between CISC and RISC becomes evident through the basic computer performance equation:
Example for RISC vs. CISC
Consider the the program fragments: mov ax, 0 mov bx, 10 mov cx, 5 add ax, bx loop Begin
CISC
mov ax, 10 mov bx, 5 mul bx, ax
RISC
Begin
RISC systems shorten execution time by reducing the clock cycles per