NT1110 Computer Structure and Logic
Unit 2 Analysis
The Pentium floating-point unit flaw only occurred on some models of the original Pentium microprocessor chip. Any of the Pentium family processors with a clock speed of at least 120 MHz is new enough not to have the bug. On the affected microprocessor models, the Intel Processor Frequency ID Utility checks for the floating-point unit flaw.
Professor Thomas Nicely sent an email describing the flaw that he had discovered in the Pentium floating point unit (FPU) to various contacts, requesting reports of testing for the flaw on the 486-DX4s, Pentium and the Pentium clones. The flaw in the Pentium FPU (floating-point unit) was quickly verified by other people around the Internet, and became known as the Pentium FDIV bug (FDIV is the x86 assembly language instruction for floating point division). An example of the flaw was found where the division result returned by the Pentium microprocessor was off by about 61 parts per million.
In June 1994, Intel discovered the floating-point unit flaw in the Pentium microprocessor. Professor Thomas Nicely, a professor of mathematics at the Lynchburg College, had written code to enumerate primes, twin primes, prime triplets, and prime quadruplets. Professor Thomas Nicely noticed some inconsistencies in the calculations on June 13th , 1994 shortly after adding a Pentium system to his group of computers, but was unable to eliminate other possible factors (such as programming errors, motherboard chipsets, etc.) until October 19, 1994. On October 24th, 1994 he reported the flaw he encountered to Intel. According to Professor Thomas Nicely, the person that he contacted at Intel later admitted to Intel being aware of the flaw since May 1994. The flaw was discovered by Intel during testing of the FPU for its new P6 core, which was first used in the Pentium Pro.
On November 7, 1994 the story first broke in an article published in Electronic Engineering Times,