Scheme and Syllabus of M Tech Programs of Indraprastha University

Scheme and Syllabus For

M.Tech. Programme In
(Information Technology, Computer Science & Engineering, Information Security) And (Electronics & Communication Engineering, Digital Communication, Signal Processing, RF & Microwave Engineering, VLSI Design)

Of Regular & Weekend Programme

Guru Gobind Singh Indraprastha University Sector – 16 C, Dwarka New Delhi – 110 078, India www.ipu.ac.in Scheme of Examination for M.Tech.(Regular & weekend) P rogramme has been approved by BoS of USICT on dated 28/05/2012 and AC subcommittee on dated 6th July, 2012 and 5th November,2012. This scheme is effective from academic

session 2012-13.

Page 1

Sr. No. 1. 2. 3. 4. 5. 6. 7. 8.

Scheme of M.Tech. (Regular Programme) M.Tech. M.Tech. M.Tech. M.Tech. M.Tech. M.Tech. M.Tech. M.Tech. (Computer Science & Engineering) (Information Technology) (Information Security) (Electronics & Communication Engineering) (Digital Communication) (Signal Processing) (RF & Microwave Engineering) (VLSI Design)

Page No. 3-6 7-10 11-14 15-18 19-22 23-26 27-30 31-34

Sr. No. 1. 2. 3.

Scheme of M.Tech. (weekend Programme) M.Tech. (Computer Science & Engineering) M.Tech. (Information Technology) M.Tech. (Electronics & Communication Engineering)

Page No. 35-40 41-46 47-52

Scheme of Examination for M.Tech.(Regular & weekend) P rogramme has been approved by BoS of USICT on dated 28/05/2012 and AC subcommittee on dated 6th July, 2012 and 5th November,2012. This scheme is effective from academic

session 2012-13.

Page 2

Master of Technology (Computer Science & Engineering)
(Regular Programme )

First Semester
Code No.
Paper

L

T/P

Credits

Page no. of Syllabus

Theory Papers MECS-601 Advanced Data Structures MECS -603 Advanced Software Engineering MECS -605 Advances in Data & Computer Communications Electives (Choose any TWO) MECS -607 Advanced Computer Architecture

4 4 4

-

4 4 4

53 54 55

MECS -609 MECS-611 MEEC-613 MECS- 613 MECS- 615

References: Signal VLSI Circuits’”, Springer, 2005. Re fe re nce Books: [1] Digital systems testing and testable design - Miron Abramovici et al , Computer Science Press (1991) [2] Test generation for VLSI chips by VD Agrawal and SC Seth, IEEE Computer Society Press (2003) ISBN 08186-8786 -X. Scheme of Examination for M.Tech.(Regular & weekend) P rogramme has been approved by BoS of USICT on dated 28/05/2012 and AC subcommittee on dated 6th July, 2012 and 5th November,2012. This scheme is effective from academic session 2012-13. Scheme of Examination for M.Tech.(Regular & weekend) P rogramme has been approved by BoS of USICT on dated 28/05/2012 and AC subcommittee on dated 6th July, 2012 and 5th November,2012. This scheme is effective from academic session 2012-13.