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Automata Theory and Discuss Gate

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Automata Theory and Discuss Gate
CS-Paper Code-B

GATE 2011

www.gateforum.com

Q. No. 1 – 25 Carry One Mark Each 1. The simplified SOP (Sum of Product) P + Q + R . P + Q + R . P + Q + R is form of the Boolean expression

)( (A) (PQ + R )
QR

(

)(

)

(B) P + QR

(

)
)(

(C) PQ + R

(

)

(D) (PQ + R )

Answer: - (B) Exp: P
0 00 01 1 11 1 10 1

f = P+R P+Q = P + QR

(

)

1

Alternate method

(P + Q + R ) . (P + Q + R ) . (P + Q + R ) = (P + Q + R ) . (P + Q + R ) . (P + Q + R )
= P QR + P QR + P QR = P Q R + R + P QR = P Q + P QR =P Q + QR = P ( Q + R) = P + Q R

(

)

(

)

2.

Which one of the following circuits is NOT equivalent to a 2-input XNOR (exclusive NOR) gate? (A) (B)

(C) Answer: - (D)

(D)

Exp: - All options except option ‘D’ gives EX-NOR gates 3. The minimum number of D flip-flops needed to design a mod-258 counter is (A) 9 Answer: - (A) Exp: - 2n ≥ 258 ⇒ n = 9 4. A thread is usually defined as a ‘light weight process’ because an operating system (OS) maintains smaller data structures for a thread than for a process. In relation to this, which of the followings is TRUE? (B) 8 (C) 512 (D) 258

© All rights reserved by Gateforum Educational Services Pvt. Ltd. No part of this document may be reproduced or utilized in any form without the written permission. Discuss GATE 2011 question paper at www.gatementor.com. 1

CS-Paper Code-B

GATE 2011

www.gateforum.com

(A) On per-thread basis, the OS maintains only CPU register state (B) The OS does not maintain a separate stack for each thread (C) On per-thread basis, the OS does not maintain virtual memory state (D) On per thread basis, the OS maintains only scheduling and accounting information Answer: - (A) 5. K4 and Q3 are graphs with the following structures
K4
Q3

Which one of the following statements is TRUE in relation to these graphs? (A) K4 is planar while Q3 is not (C) Q3 is planar while K4 is not Answer: - (B) Exp: K4 (B) Both K4 and Q3 are

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