Digital Logic Design: Simplification of Switching Function

EEN1036 Digital Logic Design

Chapter 4 part I Simplification of Switching Function

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Objective s s s

s

Simplifying logic circuit Minimization using Karnaugh map Using Karnaugh map to obtain simplified SOP and POS expression Five-variable Karnaugh map

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Simplifying Logic Circuits
• • •
A

A Boolean expression for a logic circuit may be reduced to a simpler form The simplified expression can then be used to implement a circuit equivalent to the original circuit Consider the following example:
B C

A B C + A BC

Y

AB C + AB C

Y = A B C + A BC + AB C + AB C

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Checking for common factor: Y = A B C + A BC + AB C + AB C
= A C ( B + B ) + AB (C + C )

Reduce the complement pairs to ‘1’
Y = A C ( B + B ) + AB (C + C ) = A C + AB

Draw the circuit based on the simplified expression
A B C

Y
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•
A

Consider another logic circuit:
B C

Y

Y = C( A + B + C ) + A + C

Convert to SOP expression:
Y = C( A + B + C ) + A + C = AC + B C + AC

Checking for common factor:
Y = A(C + C ) + B C = A + BC
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• • Simplification of logic circuit algebraically is not always an easy task The following two steps might be useful: i. The original expression is convert into the SOP form by repeated application of DeMorgan’s theorems and multiplication of terms ii. The product terms are then checked for common factors, and factoring is performed wherever possible

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• Consider the truth table below:
A 0 0 0 0 1 B 0 0 1 1 0 C 0 1 0 1 0 Y 0 0 1 0 0

Minterm Boolean expression: Simplify to yield:

Y = A BC + ABC + AB C

Y = BC ( A + A) + AB C = BC + AB C

1 0 1 1 1 1 0 1 1 1 1 0

•

If minterms are only differed by one bit, they can be simplified, e.g. A BC & ABC

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• More example:
A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 Y 0 1 1 0 0 1 1 0

Minterm Boolean expression:

Y = A B C + A BC + AB C + ABC

Minterms 1