Half Adder
Functions of Combinational Circuits
• Adders
A circuit to perform addition of two binary numbers, to produce a sum and carry out, is called a HalfAdder. In multi-bit binary numbers, after adding the two least significant bits, the addition becomes one of adding two operands plus the carry produced by the previous add. The circuit to implement this operation is called a Full-Adder. A circuit to add two multi-bit binary numbers together in parallel, or at least pseudo-parallel is called a ripple-carry adder. We will examine each of these circuits below.
Half Adder
The half-adder is described by block diagram, truth table and logic equation for Sum and Carry.
Fig. 7.5 Half Adder block diagram
a 0 0 1 1
b 0 1 0 1
Cout 0 0 0 1
Sum 0 1 1 0 Cout = ab a→ b→ H.A. → Sum → Cout
From the minterms in the truth table we get the following Boolean equations for the circuit. Sum = a’b + ab’ or a ⊕ b
Circuit Diagram for half adder which produces a Sum and Cout
p. 1 of 5
Functions of Combinational Circuits
Full Adder
The full-adder is described by block diagram, truth table and logic equation for Sum and Carry below.
Fig. 7.6
a 0 0 0 0 1 1 1 1
b 0 0 1 1 0 0 1 1
Cin Cout 0 1 0 1 0 1 0 1 0 0 0 1 0 1 1 1
Sum 0 1 1 0 1 0 0 1
a b cin ↓ ↓ ↓ F.A. ↓ ↓
Cout Sum
\Cin A B\ 00 01 11 10
0 0 0 1 0 Carry
1 0 1 1 1
\Cin A B\ 0 0 0 1 1 1 1 0
0 0 1 0 1 Sum
1 1 0 1 0
Cout = ab + Cin b + Cin a Sum = Cin′a′b + Cin′ab′ + Cina′b′ + Cinab = =Cin′ (a ⊕ b) + Cin (a ⊕ b) ′ Cin′ (a′b + ab′) + Cin (ab + a′b′)
=
Cin ⊕ a ⊕ b
p. 2 of 5
Functions of Combinational Circuits
Ripple-carry Adder
Cin A: = B: = SUM: c3 c2 a3 b3 s3 c1 a2 b2 s2 c0 a1 b1 s1 a0 b0 s0 A parallel binary adder implements the addition of two n bit numbers by adding the two least significant bits using a Half-adder, then the rest of the bits are added using a Full-adder. Fig. 7.7 below illustrates the addition of two four bit numbers.
Figure 6--7
• Adders
A circuit to perform addition of two binary numbers, to produce a sum and carry out, is called a HalfAdder. In multi-bit binary numbers, after adding the two least significant bits, the addition becomes one of adding two operands plus the carry produced by the previous add. The circuit to implement this operation is called a Full-Adder. A circuit to add two multi-bit binary numbers together in parallel, or at least pseudo-parallel is called a ripple-carry adder. We will examine each of these circuits below.
Half Adder
The half-adder is described by block diagram, truth table and logic equation for Sum and Carry.
Fig. 7.5 Half Adder block diagram
a 0 0 1 1
b 0 1 0 1
Cout 0 0 0 1
Sum 0 1 1 0 Cout = ab a→ b→ H.A. → Sum → Cout
From the minterms in the truth table we get the following Boolean equations for the circuit. Sum = a’b + ab’ or a ⊕ b
Circuit Diagram for half adder which produces a Sum and Cout
p. 1 of 5
Functions of Combinational Circuits
Full Adder
The full-adder is described by block diagram, truth table and logic equation for Sum and Carry below.
Fig. 7.6
a 0 0 0 0 1 1 1 1
b 0 0 1 1 0 0 1 1
Cin Cout 0 1 0 1 0 1 0 1 0 0 0 1 0 1 1 1
Sum 0 1 1 0 1 0 0 1
a b cin ↓ ↓ ↓ F.A. ↓ ↓
Cout Sum
\Cin A B\ 00 01 11 10
0 0 0 1 0 Carry
1 0 1 1 1
\Cin A B\ 0 0 0 1 1 1 1 0
0 0 1 0 1 Sum
1 1 0 1 0
Cout = ab + Cin b + Cin a Sum = Cin′a′b + Cin′ab′ + Cina′b′ + Cinab = =Cin′ (a ⊕ b) + Cin (a ⊕ b) ′ Cin′ (a′b + ab′) + Cin (ab + a′b′)
=
Cin ⊕ a ⊕ b
p. 2 of 5
Functions of Combinational Circuits
Ripple-carry Adder
Cin A: = B: = SUM: c3 c2 a3 b3 s3 c1 a2 b2 s2 c0 a1 b1 s1 a0 b0 s0 A parallel binary adder implements the addition of two n bit numbers by adding the two least significant bits using a Half-adder, then the rest of the bits are added using a Full-adder. Fig. 7.7 below illustrates the addition of two four bit numbers.
Figure 6--7