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Risc & Pipelining

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Risc & Pipelining
What is RISC Architecture? * RISC stands for Reduced Instruction Set Computer. * An Instruction set is a set of instructions that helps the user to construct machine language programs to do computable tasks.

History * In early days, the mainframes consumed a lot of resources for operations * Due to this, in 1980 David Paterson, University of Berkeley introduced the RISC concept. * This included fewer instructions with simple constructs which had faster execution, and less memory usage by the CPU. * Approximately a year was taken to design and fabricate RISC I in silicon * In 1983, Berkeley RISC II was produced. It is with RISC II that RISC idea was opened to the industry. * In later years it was incorporated into Intel Processors * After some years, a revolution took place between the two Instruction Sets. * Whereby RISC started incorporating more complex instructions and CISC started to reduce the complexity of their instructions. * By mid 1990’s some RISC processors became more complex than CISC! * In today’s date the difference between the RISC and CISC is blurred.

Characteristics and Comparisons * As mentioned, the difference between RISC and CISC is getting eradicated. But these were the initial differences between the two.

RISC | CISC | Fewer instructions | More (100-250) | More registers hence more on chip memory (faster) | Less registers | Operations done within the registers of the CPU | Can be done external to CPU eg memory | Fixed length instruction format hence easily decoded | Variable length | Instruction execution in one clock cycle hence simpler instructions | In multiple clock cycles | Hard wired hence faster | Micro programmed | Fewer addressing modes | A variety |

Addressing modes : Register direct. Immediate addressing, Absolute addressing
Give examples on one set of instructions for a particular operation, Instruction Formats

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