RISC:-
Reduced Instruction Set Computer
• Small number of instructions
• Instruction size constant
• Bans the indirect addressing mode
• Retains only those instructions that can be overlapped and made to execute in one machine cycle or less.
Examples of RISC
• Apple iPods (custom ARM7TDMI SoC)
• Apple iPhone (Samsung ARM1176JZF)
• Palm and PocketPC PDAs and smartphones (Intel XScale family, Samsung SC32442 - ARM9)
• Nintendo Game Boy Advance (ARM7)
• Nintendo DS (ARM7, ARM9)
• Sony Network Walkman (Sony in-house ARM based chip)
• Some Nokia and Sony Ericsson mobile phones
Pro’s
• Emphasis on software
• Single-clock, reduced instruction only
• Register to register:
"LOAD" and "STORE" are independent instructions
• Low cycles per second, large code sizes
• Spends more transistors on memory registers
Con’s
• It takes multiple instructions to perform a task that would take one instruction in a CISC processor.
• RISC architectures put a greater burden on the software. Is this worth the trouble because conventional microprocessors are becoming increasingly fast and cheap anyway?
CISC:-
Complex Instruction Set Computer
• Large number of complex instructions
• Low level
• Facilitate the extensive manipulation of low-level computational elements and events such as memory, binary arithmetic, and addressing.
Examples of CISC
• System/360(excluding the 'scientific' Model 44),
• VAX,
• PDP-11,
• Motorola 68000 family
• Intel x86 architecture based processors.
Pro’s
• Emphasis on hardware
• Includes multi-clock complex instructions
• Memory-to-memory:
"LOAD" and "STORE” incorporated in instructions
• Small code sizes, high cycles per second
• Transistors used for storing complex instructions
Con’s
• That is, the incorporation of older instruction sets into new generations of processors tended to force growing complexity.
• Many specialized CISC instructions were not used