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Bipolar Complementary Metal Oxide Semiconductor Process Technology and Integration

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Bipolar Complementary Metal Oxide Semiconductor Process Technology and Integration
Unit-II: MOS/BiCMOS Process Technology and Integration

Introduction

BiCMOS = CMOS + Bipolar (BJT) structures on the same substrate.

Advantanges of CMOS device:

1. Low Power

2. High digital IC density.

Advantages of Bipolar transistors:

1. Ability to deliver large drive currents

2. Capability to rapidly charge heavy loads.

The implementation of digital bipolar circuits with emitter-coupled logic (ECL) gates permits small logic swings and excellent noise immunity.

The integration of high-density, low- power CMOS logic arrays and high-speed bipolar drivers produces gate arrays that not only are faster than comparable CMOS but consume far less power than fellow ECL arrays whose device density is approximately the same. Both analog and digital functions can be integrated on the same BiCMOS chip, and the selection between a transistor-transistor logic (TTL) or ECL interface is possible at the expense of process complexity, involving complex technology development, the chip-manufacturing task, a longer processing time, and higher production costs.

=> The BiCMOS technology is not pursued to replace the CMOS technology that is currently employed in digital systems and requires low and medium performance.

.

The Realization of BiCMOS Processes

The BiCMOS circuits used earlier are CMOS intensive, due to the limitation in power dissipation of the bipolar devices. Hence the BiCMOS technologies have evolved from the CMOS processes. The initial approach was to graft auxiliary steps to well-established CMOS processes, to produce bipolar devices without degrading the characteristics of the CMOS transistors.

Groups/Types of BiCMOS technologies:

(1) Low-Cost, Medium-Speed, 5-V Digital BiCMOS Process

(2) High-Performance, High- Cost, 5-V Digital BiCMOS Process

(3) Integrated Analog/Digital BiCMOS Process.

Processes (1) & (2) are developed with the addition of a few extra mask sets to the conventional CMOS process.

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