Microprocessor 8086
UNIT III
8086 MICROPROCESSOR INTERFACING
3.1 Introduction
This unit explains how to design and implement an 8086 based microcomputer system. To design an 8086 based system, it is necessary to know how to interface the 8086 microprocessor with memory and input and output devices. Due to the mismatch in the speed between the microprocessor and other devices, a set of latches and buffers are required to interface the microprocessor with other devices. In this unit, you will learn about the way in which address/data buses, latches and buffers are used in the process of interfacing. To understand the interfacing principles and concepts it is necessary to learn the various types of bus cycles and bus timings. Overall, this unit makes you to understand how 8086 microprocessor is interfaced with memory and peripherals and how an 8086 based microcomputer system works.
3.2 Learning Objectives
• To study about the operating modes of 8086 • To study about the components of an 8086 based microcomputer system • To understand the address/data buses of an 8086 based system • To understand the necessity of latches and buffers • To learn the various types of bus cycles • To learn the bus timings • To study about the interfacing principles and ideas
3.3 8086-Based Microcomputer System
An 8086-based microcomputer system has the following components. • 8086 CPU • ROM • RAM • Peripherals • Control bus • Address bus • Data bus • Clock generator • Interrupt Controller • DMA Controller • Latches • Transceivers
The basic control bus consists of the signals labeled M/IO (Active Low), RD (Active Low) and WR (Active Low). If the operation to be performed by 8086 is a read (either from a memory location or from a port) the RD (Active Low) goes low and if the operation to be performed by 8086 is a write (either to a memory location or to a port) the WR (Active Low) signal is asserted. If the read or write
8086 MICROPROCESSOR INTERFACING
3.1 Introduction
This unit explains how to design and implement an 8086 based microcomputer system. To design an 8086 based system, it is necessary to know how to interface the 8086 microprocessor with memory and input and output devices. Due to the mismatch in the speed between the microprocessor and other devices, a set of latches and buffers are required to interface the microprocessor with other devices. In this unit, you will learn about the way in which address/data buses, latches and buffers are used in the process of interfacing. To understand the interfacing principles and concepts it is necessary to learn the various types of bus cycles and bus timings. Overall, this unit makes you to understand how 8086 microprocessor is interfaced with memory and peripherals and how an 8086 based microcomputer system works.
3.2 Learning Objectives
• To study about the operating modes of 8086 • To study about the components of an 8086 based microcomputer system • To understand the address/data buses of an 8086 based system • To understand the necessity of latches and buffers • To learn the various types of bus cycles • To learn the bus timings • To study about the interfacing principles and ideas
3.3 8086-Based Microcomputer System
An 8086-based microcomputer system has the following components. • 8086 CPU • ROM • RAM • Peripherals • Control bus • Address bus • Data bus • Clock generator • Interrupt Controller • DMA Controller • Latches • Transceivers
The basic control bus consists of the signals labeled M/IO (Active Low), RD (Active Low) and WR (Active Low). If the operation to be performed by 8086 is a read (either from a memory location or from a port) the RD (Active Low) goes low and if the operation to be performed by 8086 is a write (either to a memory location or to a port) the WR (Active Low) signal is asserted. If the read or write