Mpmc on 8086
8086 Architecture
• Architecture of 8086 microprocessor (8086 Internal Block Diagram) • Register organization • Special functions of General Purpose Registers • Memory Segmentation • Address Generation • Pin Description • Minimum & Maximum modes • Timing diagram.
Intel 8086 Microprocessor
• Manufactured by Intel in 1978 • Features: – 16-Bit Microprocessor – 16-Bit Data Bus – 20-Bit Address Bus (Lower 16-Bits Shared with Data Bus) • 220 = 210 * 210 = 1 MB. – 40 Pin DIP – Improved architecture. – Overlapped fetch and execution using Queue – More powerful instruction set, Interrupt structure – High speed, Programming flexibility – CPU Clock rate : 5 MHz to 10 MHz
Intel 8086 Microprocessor (Contd.)
• Common manufacturer(s): Intel, AMD, NEC, Fujitsu, Harris (Intersil), OKI, Siemens AG, Texas Instruments, Mitsubishi.
8086 Architecture
• The architecture of 8086 divided into two sections. – Bus Interface Unit (BIU) – Execution Unit (EU) • The architecture of 8086 includes – Arithmetic Logic Unit (ALU) – Flags – General registers – Segment registers – Instruction byte queue
8086 Internal Block Diagram
8086 Internal Block Diagram
8086 Architecture (Contd.)
• Reason for splitting: – The major reason for this separation into BIU and EU is to increase the processing speed of the processor. • Bus Interface Unit (BIU): – Interact with memory and input and output devices in fetching the instructions and data required by the EU. – Contains Segment registers and circuit for Physical address calculations. – Stages: Fetch, Decode, Execute. (Overlapping of stages is Pipelining). – In 8085 once Op-code is fetched and decoded, the external bus remains free until execution of instruction. – In 8086 Queue (6-Byte) is used which overlaps fetch and execution cycles, not present in 8085.
8086 Architecture (Contd.)
• Execution Unit (EU): – Contains • General purpose registers, and some special function registers like pointers, index, flags. • 16Bit ALU. •
• Architecture of 8086 microprocessor (8086 Internal Block Diagram) • Register organization • Special functions of General Purpose Registers • Memory Segmentation • Address Generation • Pin Description • Minimum & Maximum modes • Timing diagram.
Intel 8086 Microprocessor
• Manufactured by Intel in 1978 • Features: – 16-Bit Microprocessor – 16-Bit Data Bus – 20-Bit Address Bus (Lower 16-Bits Shared with Data Bus) • 220 = 210 * 210 = 1 MB. – 40 Pin DIP – Improved architecture. – Overlapped fetch and execution using Queue – More powerful instruction set, Interrupt structure – High speed, Programming flexibility – CPU Clock rate : 5 MHz to 10 MHz
Intel 8086 Microprocessor (Contd.)
• Common manufacturer(s): Intel, AMD, NEC, Fujitsu, Harris (Intersil), OKI, Siemens AG, Texas Instruments, Mitsubishi.
8086 Architecture
• The architecture of 8086 divided into two sections. – Bus Interface Unit (BIU) – Execution Unit (EU) • The architecture of 8086 includes – Arithmetic Logic Unit (ALU) – Flags – General registers – Segment registers – Instruction byte queue
8086 Internal Block Diagram
8086 Internal Block Diagram
8086 Architecture (Contd.)
• Reason for splitting: – The major reason for this separation into BIU and EU is to increase the processing speed of the processor. • Bus Interface Unit (BIU): – Interact with memory and input and output devices in fetching the instructions and data required by the EU. – Contains Segment registers and circuit for Physical address calculations. – Stages: Fetch, Decode, Execute. (Overlapping of stages is Pipelining). – In 8085 once Op-code is fetched and decoded, the external bus remains free until execution of instruction. – In 8086 Queue (6-Byte) is used which overlaps fetch and execution cycles, not present in 8085.
8086 Architecture (Contd.)
• Execution Unit (EU): – Contains • General purpose registers, and some special function registers like pointers, index, flags. • 16Bit ALU. •
References: – Advanced Microprocessors & Peripherals – A K Ray, K M Bhuruchandi, 2nd Edition, McGraw Hill, 2010. – Microprocessors and Interfacing, Programming and Hardware – Douglas V Hall, 2nd Edition, McGraw Hill. 2005. – Introduction to 8086 microprocessor, (PPT) - Dr.P.Yogesh, Senior Lecturer, DCSE, CEG Campus, Anna University, Chennai-25. – Computer Architecture and organization, From 8085 to Core2Duo and beyond – Subrata Ghoshal, Pearson, 2011.