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SEQUENCE DECTOR

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SEQUENCE DECTOR
Design of the 11011 Sequence Detector
A sequence detector accepts as input a string of bits: either 0 or 1.
Its output goes to 1 when a target sequence has been detected.
There are two basic types: overlap and non-overlap.
In an sequence detector that allows overlap, the final bits of one sequence can be the start of another sequence.
11011 detector with overlap

11011011011

Z
11011 detector with no overlap

X

00001001001

Z

00001000001

Slide 1 of 23 slides
Revised 9/28/2009
Copyright © 2009 by Edward L. Bosworth, Ph.D. All rights reserved.

Chapter 7 Appendix

Design of a 11011 Sequence Detector

Problem: Design a 11011 sequence detector using JK flip-flops. Allow overlap. Step 1 – Derive the State Diagram and State Table for the Problem
Step 1a – Determine the Number of States
We are designing a sequence detector for a 5-bit sequence, so we need 5 states.
We label these states A, B, C, D, and E. State A is the initial state.
Step 1b – Characterize Each State by What has been Input and What is Expected
State
A

Has
--

Awaiting
11011

B

1

1011

C

11

011

D

110

11

E

1101

1

Slide 2 of 23 slides
Revised 9/28/2009
Copyright © 2009 by Edward L. Bosworth, Ph.D. All rights reserved.

Chapter 7 Appendix

Design of a 11011 Sequence Detector

Step 1c – Do the Transitions for the Expected Sequence
Here is a partial drawing of the state diagram. It has only the sequence expected. Note that the diagram returns to state C after a successful detection; the final 11 are used again.

B
1/0

1/0
A

C
1/1

E

0/0

D
1/0

The sequence is 1

Note the labeling of the transitions: X /
Z. Thus the expected transition from A to B has an input of 1 and an output of
0.

The transition from E to C has an output of 1 denoting that the desired sequence has been detected.

1 0 1 1.

Slide 3 of 23 slides
Revised 9/28/2009
Copyright © 2009 by Edward L. Bosworth, Ph.D.

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