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Data Hierarchy and Loading Db

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Data Hierarchy and Loading Db
DC Professional (TM) DC Expert (TM) DC Ultra (TM) FloorPlan Manager (TM) HDL Compiler (TM) VHDL Compiler (TM) Library Compiler (TM) DesignWare Developer (TM) DFT Compiler (TM) BSD Compiler Power Compiler (TM)

Version C-2009.06-SP1 for amd64 -- Jul 20, 2009 Copyright (c) 1988-2009 by Synopsys, Inc. ALL RIGHTS RESERVED

This software and the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software is subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc.

The above trademark notice does not imply that you are licensed to use all of the listed products. You are licensed to use only those products for which you have lawfully obtained a valid license key.

Initializing...
####################################
## define global parameters stage ##
####################################
define_name_rules preview -allowed "a-zA-Z0-9_" -max_length 48
1
set template_naming_style "%s"
%s
set bus_dimension_separator_style "_"
_
set hdlin_array_instance_naming_style "%s_%d_"
%s_%d_
set verilogout_no_tri "true" true set verilogout_single_bit "false" false set hdlin_enable_vpp "true"
Information: Variable 'hdlin_enable_vpp' is obsolete and is being ignored. (INFO-100) true set hdlin_preserve_vpp_files "true"
Information: Variable 'hdlin_preserve_vpp_files' is obsolete and is being ignored. (INFO-100) true set edifout_no_array "true" true set write_name_nets_same_as_ports
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