Preview

Logic Gates

Satisfactory Essays
Open Document
Open Document
754 Words
Grammar
Grammar
Plagiarism
Plagiarism
Writing
Writing
Score
Score
Logic Gates
ADDERS AND SUBTRACTORS

September 18th, 2007 CSC343 Fall 2007 Prepared by: Steven Medina

PURPOSE
The purpose of this lab is to show you how to implement an adder using Quartus. As the name implies, adders are used to add two sets of values together. Adders are a very common design in digital design. For example, a CPU will use an adder to have its program counter point to its next instruction. This is done by adding a constant value of 4 to the current instructions memory address. You will be using adders both here, and in future labs. You will be shown three different kinds of adders. They are the half-adder, the full-adder. And the ripple carry adder. The purpose is to show you not only what each is, but why they are important. You will learn why each is important as you go through this lab. After creating our adder designs in Quartus, you will test your design on Altera’s DE2 programmable board. The DE2 board will be explained later in this lab.

HALF-ADDER
A half-adder (HA) is an adder that accepts two inputs and gives two outputs. The two inputs are the two single bit binary values that will be added to each other. The two outputs represent the sum. We need two outputs (rather than one output) because the sum may have a carry bit. For example, in binary, 1+0 = 1. This situation has no carry bit in the output. In other words, the output itself is 1 bit. However, if we add 1+1, we get 10. This output is 2 bits long. This is a case where the carry-bit for the output is needed. A half adder consists of two logic gates. These are an AND gate, and an Exclusive OR gate. A diagram of a half adder is shown below.

. Figure 1: Half Adder using XOR and AND gate.

For the design of the half adder, do the following. 1) Create a new project in Quartus. Where it asks for the family or device you wish to target for compilation, select the Cyclone II board. Under the list of available devices, click EP2C35F672C6. 2) Design the half-adder shown in figure 1 in a

You May Also Find These Documents Helpful

  • Satisfactory Essays

    ECT114 week 3 lab

    • 299 Words
    • 2 Pages

    d. Open a block diagram file in Quartus II, Insert the logic symbol from part b. Add inputs and outputs. Name the inputs SWITCH1 and SWITCH2. Label the output as LIGHT. Copy and insert your figure below. (4 points)…

    • 299 Words
    • 2 Pages
    Satisfactory Essays
  • Powerful Essays

    En1320 Unit 1 Research Paper 1

    • 27742 Words
    • 111 Pages

    The code in Figure 2-8 shows that even a simple operation, such as the addition of two…

    • 27742 Words
    • 111 Pages
    Powerful Essays
  • Satisfactory Essays

    Week 1 HW Graded

    • 1751 Words
    • 26 Pages

    The output of an AND gate should be 1 when ALL inputs are 1. The output of an AND gate should be 0 when ANY input is 0. For more information, refer to the Week 1 Lecture or page 59 of the textbook.…

    • 1751 Words
    • 26 Pages
    Satisfactory Essays
  • Satisfactory Essays

    Today’s lecture will be spent entirely in the computer lab. At the end of lab, submit this worksheet.…

    • 581 Words
    • 3 Pages
    Satisfactory Essays
  • Good Essays

    Compter Science

    • 819 Words
    • 4 Pages

    truth table construction, subexpression construction using AND and NOT gates, subexpression combination using OR gates, circuit diagram production…

    • 819 Words
    • 4 Pages
    Good Essays
  • Satisfactory Essays

    Ece241 Project

    • 583 Words
    • 3 Pages

    Recommended Design Techniques for ECE241 Project Franjo Plavec Department of Electrical and Computer Engineering University of Toronto DISCLAIMER: The information contained in this document does NOT contain official grading policy. The information provided here is based on my personal experience with ECE241 course projects in the previous years. Its purpose is to warn you of some common mistakes and answer some common questions student in earlier years had. As grading policies and project requirements change from year to year, please consult course web site or your instructor for official policies. THIS DOCUMENT MAY CONTAIN SOME MISTAKES. I will do my best to point those mistakes to you if I discover any, but I cannot make any guarantees. All information in this document is MY PERSONAL PREFERRED WAY OF DOING VARIOUS TASKS RELATED TO HARDWARE DESIGN. It is by no means the only possible way to perform these tasks. Also, this document does not cover, nor does it attempt to cover all aspects of various problems discussed. Therefore, you should not make any implications on aspects of the problems not mentioned in this document. In other words, if the document states X, and you try to do Y, which is “very similar to X”, do not assume that statements this document makes for X necessarily hold for Y. CHECK YOUR ASSUMPTIONS against your textbook, course notes, your instructor’s and/or TA’s advice, compilation and simulation results from Quartus, and finally, common sense. Verilog and Quartus Issues When using Verilog for the first time in a real project, users are often tempted to use fancy features of the language to make their lives easier. Unfortunately, if one succumbs to those temptations, they usually make their lives harder. The main reason for that is that Verilog, the way it is used in ECE241 labs and the way Quartus II interprets it, is not a programming language. Verilog is a hardware description language, meaning that various blocks of code directly map into…

    • 583 Words
    • 3 Pages
    Satisfactory Essays
  • Good Essays

    Figure 1: Overall Block Diagram The goal of this project is to provide you with a more practical hands-on approach to computer architecture design problems. The processor complex you will be designing is a 32-bit version of the MIPS processor; however, the instruction set will be a small subset of the actual MIPS ISA. You should implement the end to end operation of the complex utilizing the VHDL hardware descriptive language. You may use any constructs within the VHDL language, however, the design must be of your own. Copying of any form from any other student or any internal or external sources is illegal and will not be accepted. The processor supports the three instruction formats: R-format, I-format, and J-format as described in the text book and lectures. Table I Summarizes the core set of instructions for your ISA. The memory is assumed to be byte addressable and each word is 32 bits.…

    • 1082 Words
    • 5 Pages
    Good Essays
  • Good Essays

    ECET230 Lab1 Procedures

    • 2138 Words
    • 8 Pages

    The circuit design for this Lab is entered using Computer Aided Engineering (CAE) design tools for Altera’s programmable logic family. These tools allow the complete design, compilation, simulation, verification, and programming of a programmable logic IC to be done in one simple, user-friendly design environment.…

    • 2138 Words
    • 8 Pages
    Good Essays
  • Powerful Essays

    Altera Quartus Experiment

    • 19294 Words
    • 78 Pages

    The Adder/Subtractors main function and working principles were defined in an AHDL file with name…

    • 19294 Words
    • 78 Pages
    Powerful Essays
  • Satisfactory Essays

    quiz 1 answer

    • 291 Words
    • 5 Pages

    5. Implement the function g = (a+b)(a'+c) using only NOR gates. You may use NOR gates…

    • 291 Words
    • 5 Pages
    Satisfactory Essays
  • Satisfactory Essays

    Logic gates

    • 1375 Words
    • 5 Pages

    Activity 6.3.2 Logic Gates Introduction A two-valued number system is the basis for all of the powerful computers and electronic devices in the world. Those two values are 0 and 1. Everything in the digital world is based on this binary system. While it seems very simple, the binary system is used to create the logic that dictates the actions of complex and simpler digital systems. But how do processors know what to do with all of those 0s and 1s Gates are used. Gates process the 0s and 1s and react based on how they are designed to function. When many gates are combined, computers can solve complex problems by using the logic set forth by the combination and order of the gates. Equipment Logic Gates presentation Gateway To Technology notebook Procedure You will decipher and create logic statements to compare conditions with outputs. Your instructor will present Logic Gates.ppt while you complete this document. Digital Signals Describe how digital signals are represented. The columns below represent 8 segments of time. Each time segment can hold a digital signal. Trace a wave pattern to represent the binary number 10001101. Complete the chart for the NOT Gate. SymbolFunction A logic gate that changes its input logic level to the opposite stateTruth Table A Y 0 1 1 0 Complete the chart for the AND Gate. SymbolFunction SHAPE MERGEFORMAT A logic circuit whose Inputs both 1 then, Output 1Truth Table A B Y 0 0 0 0 1 0 1 0 0 1 1 1 Logic Word Problem (Original Example) If I am hungry and it is 500 p.m., then I will eat dinner. In your GTT notebook, sketch a circuit diagram that behaves like an AND Gate using a battery, two switches, and an LED output. Complete the chart for the OR Gate. SymbolFunction SHAPE MERGEFORMAT A logic circuit when Either Input 1 then, Output 1Truth Table A B Y 0 0 0 0 1 1 1 0 1 1 1 1 Logic Word Problem (Original Example) In your GTT notebook, sketch a circuit diagram that behaves like an OR Gate using a battery, two switches,…

    • 1375 Words
    • 5 Pages
    Satisfactory Essays
  • Powerful Essays

    Digital Design Flow Options

    • 5497 Words
    • 22 Pages

    transistors) consumes a considerable amount of time to design. The digital part of the chip (probably containing tens of thousands to a million transistors) needs to be developed in a relatively short period of time. Thus design team needs to place a few thousand gates quickly and reliably. To support this, the choice of CAD tools becomes critical. A good CAD tool can drastically reduce the time required to design a large digital block. The scope of this thesis is to search for an optimal digital design flow. The aim is to use a set of commercial and open sourced tools and bring digital logic design to such a stage that the…

    • 5497 Words
    • 22 Pages
    Powerful Essays
  • Satisfactory Essays

    4 . When a program or module uses another module, you can refer to the main program as the ____ program.…

    • 2498 Words
    • 10 Pages
    Satisfactory Essays
  • Better Essays

    Although the output is driven out only by three steps, because of the resistances and the drivers the full adder proposed in [36] suffers from a large lay out area and huge power consumption.…

    • 1467 Words
    • 6 Pages
    Better Essays
  • Better Essays

    language into assembly language. It also discusses advanced arithmetic and logical operations including multiprecision operations and tricks you can play with various instructions.…

    • 3431 Words
    • 14 Pages
    Better Essays